D flip-flop, edge triggered
The edge-triggered D flip-flop corresponds to a D flip-flop, with the addition that the value at the input D is only stored if there is a positive edge from 0 to 1 at clock input C.
Truth table
| C | D | Q1 | Q2 |
|---|---|---|---|
| ↑ | 0 | 0 | 1 |
| ↑ | 1 | 1 | 0 |
| x | x | q1 | q2 |
Comments:
x = any (0 or 1) ↑ = positive edge from 0 to 1 q = state of output Q remains unchanged
Adjustable parameters
| Designation | Range | Default value |
|---|---|---|
| Voltage level (lo) | 0.1 ... 24 V | 0.8 |
| Voltage level (hi) | 0.1 ... 24 V | 2 |
| Designation | Range | Default value |
|---|---|---|
| Voltage level (lo) | 0 ... 24 V | 0 |
| Voltage level (hi) | 0.1 ... 24 V | 5 |
| Resistance | 0.1 ... 1000 Ohm | 50 |